The Effect of Metallic Interconnect Spacing on the Thermal Resistance of Flip-Chip Light-Emitting Diodes With Underfill Encapsulation

Abstract

While highly thermally conductive underfill material has been proposed as a solution for reducing the thermal resistance of flip-chip light-emitting diode (FCLED) packages, studies up until this point have not taken into account the layout of the underlying metallic interconnects and its impact on thermal resistance. This paper provides a deeper investigation into how interconnect spacing affects thermal resistance in conjunction over a range of underfill thermal conductivities. Test vehicles utilizing FCLEDs and copper–tin interconnects were fabricated, tested for thermal resistance, and simulated with ANSYS finite-element analysis software. A follow-up parametric study was performed, in which the effectiveness of increasing underfill thermal conductivity was demonstrated to be highly dependent on the distance between conductive metal interconnects. It was found that when the gap between interconnects is sufficiently small, the thermal conductivity of the underfill plays a negligible role in the overall thermal resistance of the FCLED package. For instance, when the gap is $200~\mu \text{m}$ , an underfill with a relatively high thermal conductivity of 1.0 $\text{W}\cdot \text{m}^{-1}\cdot \text{K}^{-1}$ underfill only reduces thermal resistance ( $\Theta _{\mathrm {JC}}$ ) versus a no-underfill scenario by 2.6% more than does an underfill with a thermal resistance of 0.25 $\text{W}\cdot \text{m}^{-1}\cdot \text{K}^{-1}$ . This effect can be leveraged during package design to allow for unfilled underfill materials to be used, reducing cost and process time.