The effect of interface states, excess capacitance and series resistance in the Al/SiO 2/p-Si Schottky diodes

Abstract

The current–voltage ( I– V) characteristics of Al/SiO 2/p-Si metal–insulator–semiconductor (MIS) Schottky diodes were measured at room temperature. In addition the capacitance–voltage ( C– V) and conductance–voltage ( G– V) measurements are studied at frequency range of 10 kHz–1 MHz. The higher value of ideality factor of 3.25 was attributed to the presence of an interfacial insulator layer between metal and semiconductor and the high density of interface states localized at Si/SiO 2 interface. The density of interface states ( N ss) distribution profile as a function of ( E ss − E v) was extracted from the forward bias I– V measurements by taking into account the bias dependence of the effective barrier height ( Φ e) at room temperature for the Schottky diode on the order of ≅4 × 10 13 eV −1 cm −2 . These high values of N ss were responsible for the non-ideal behaviour of I– V and C– V characteristics. Frequency dispersion in C– V and G– V can be interpreted only in terms of interface states. The N ss can follow the ac signal especially at low frequencies and yield an excess capacitance. Experimental results show that the I– V, C– V and G– V characteristics of SD are affected not only in N ss but also in series resistance ( R s), and the location of N ss and R s has a significant on electrical characteristics of Schottky diodes.