Abstract

A digit slicing technique was proposed to speed up the computation of important parameters in digital signal processing. In this paper we describe the use of a technique to produce fast second-order digit sliced IIR digital filter chips. The silicon chip is produced by using an IC design package called CIRCAD II. The digit slicing technique has been described in detail by Z. A. Shariff. The technique involves slicing up either filter coefficients or input data or both into smaller blocks of data with a certain bit width. These smaller blocks, also known as sub-blocks are processed in parallel by the process unit within the sub-blocks, thus speeding up the processing time. A sub-block with a processing unit is also known as a digit convolution module. In our design we sliced both the 16-bit coefficients and the 16-bit input data. Because of the slicing technique, the IC realization of the filter can be done in modular form which thus makes it easy for chip implementation.

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