The design of [formula omitted]-ADC in MEMS gyro interface ASIC

Abstract

This article aims at MEMS gyroscope fully differential (FD) sensing, small signal output characteristics, designs a FD third-order cascade of integrators with feedforward (CIFF) delta-sigma analog-to-digital converter (ΔΣ-ADC). Abandoning the local negative feedback in the general third-order CIFF to reduce the difficulty of layout design. And under the premise of ensuring accuracy and stability, discarding the path directly from the input to the quantizer to reduce the circuit area and the influence of harmonics on the signal-to-noise-distortion ratio (SNDR) caused by the input sampling. In order to reduce the mismatch of capacitors, the gain factor and feedforward factor are optimized, so that each factor only retains one decimal place, and all capacitors on the layout are composed of 0.2pF unit capacitors in parallel. The tape-out measurement results show that the SNDR of the ΔΣ-ADC chip is 50.13 dB in the bandwidth (BW) range of 1kHz to 11kHz, and the input signal amplitude range is 1 mV to 800 mV.