The Design of an Operational Amplifier Using Silicon Carbide JFETs

Abstract

Superior performance of the Silicon Carbide (SiC) semiconductor in high temperature and harsh environment is widely known. However, utilizing the Vertical Channel 4H-SiC JFET (SiC JFET) for analog design exhibits significant design challenges, even at room temperature. The fundamental challenges are low intrinsic gain, the limitation of the Gate to Source Voltage Range (GSVR), and restrictions on utilizing Channel Length (CL) as a design parameter due to fabrication complexity. These challenges must be successfully overcome at room temperature, before moving towards high temperature design. The main objective of this paper is to establish a design base, overcome the challenges, demonstrate the feasibility, and present a novel all SiC JFET based operational amplifier (opamp) that addresses overall performance at room temperature. Before attempting design, Enhancement Mode (EM) and Depletion Mode (DM) SiC JFETs are characterized, analyzed, and modeled for simulation. A unique and reliable four stage opamp configuration is presented that takes design requirements into account, uses threshold voltage (V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">th</sub> ) in place of CL as a design parameter, and employs gain enhancing design techniques while achieving maximum obtainable frequency response. The final opamp is fabricated and tested and shown to have 66.7 dB DC gain and 5.71 MHz unity gain frequency.