Abstract
This paper describes a high-speed current switching CMOS digital analog converter (DAC) circuit that achieves 8-bit resolution, low differential nonlinearity (DNL), 20M samples per second conversion rate, low glitch energy and 5 V power supply voltage by using the MOSIS SCNA20 2 /spl mu/m process. The converter is based on current division by using a segmentation technique. The current switching is used instead of voltage switching because current can be switched in and out of a circuit faster than voltage. The developed DAC employs two internal DACs. Each internal DAC has its own advantages. This DAC used thermometer code for three bit MSBs and R2R ladder for 5 bit LSBs.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
