The Dependence of Physical Memory Footprint of Processor on the Applications

Abstract

Recently, with growing the gap between processors and memory speeds, parallel performance on chip multicore processors becomes more attractive for filling up this gap. In this direction, calculating the Cycle Per Instructions (CPI) and its relationship with cache miss ratio is important. In this paper, impact of cache usage on Intel i5–460M processor by SPEC CPU2000 with fixed point operations is investigated. At first, the model of the memory hierarchy is under discussion. Afterwards, dependency of cache memory usage is discussed. In part IV and V, regression analysis of data and results are considered. Experiments exploited VTune 2013 counters demonstrate that switching off particular caches depended on kind of application enhances processor performance.