Abstract
To improve the performance of analog, RF, and digital integrated circuits, the cutting-edge advanced CMOS technology has been widely utilized. We successfully designed and implemented a high-speed and low-power serial-to-parallel (S2P) converter for 5G applications based on the 28 nm CMOS technology. It can update data easily and quickly using the proposed address allocation method. To verify the performances, an embedded system (NI-FPGA) for fast clock generation on the evaluation board level was also used. The proposed S2P converter circuit shows extremely low power consumption of 28.1 uW at 0.91 V with a core die area of 60 × 60 μm2 and operates successfully over a wide clock frequency range from 5 M to 40 MHz.
Highlights
The RF signal on a real-time basis is controllable through the dynamic digital control
Static case can help to find an optimal value through tuning work to increase the efficiency of the system. They have been implemented with advanced CMOS technology to enable fast operation with low power consumption that is strongly required especially for 5G systems application
We firstly showed the successful demonstration of a series-to-parallel (S2 P) converter circuit design using 28 nm CMOS process for 5G system that was capable of 160-bit control
Summary
As the 5G system demands broadband and high data rates, the system configuration becomes more complicated. A typical 5G system utilizes a multi-antenna MIMO structure for beamforming operation, and it requires analog/digital control circuits to change the RF (radio frequency) gains and phases of multiple channels by compensating the performances with temperature and corner variations [1,2,3]. Static case can help to find an optimal value through tuning work to increase the efficiency of the system They have been implemented with advanced CMOS technology to enable fast operation with low power consumption that is strongly required especially for 5G systems application. The series-to-parallel (S2 P) converter is as digital circuit that feed the input data serially, and read the output in parallel fashion It has the advantage of being controlled by a simple circuit and leads to provide specific optimum condition to circuit [10].
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