The demonstration of D-SMT stressor on Si and Ge n-FinFETs

Abstract

The ~20% Id,sat improvement is demonstrated successfully on the Si and Ge n-FinFETs with the implement of D-SMT stressor for the first time, based on the optimization of dislocation angle and the understanding of crystal re-growth velocities along different surface planes and directions in Si and Ge. The mobility enhancement ratio with D-SMT stressor in Ge n-FinFET (37%) is found to be larger than it in the Si n-FinFET (30%). Ultra-high capping stress film (>3 GPa) is needed and is the must to modify the crystal re-growth velocities along the [100] and [110] directions for the dislocation angle optimization and the implement of D-SMT on the FinFET structure. The larger stress and mobility enhancement ratio are observed in the narrower gate width device, due to the effect of triple crystal re-growth directions on the FinFET structure. Finally, the mobility enhancement ratio with the stress on the Si (100)/[110], Si (110)/[110], Ge (100)/[110] and Ge (110)/[110] is calculated theoretically and further discussed.