The current status of metallization in integrated circuit applications

Abstract

With the progression towards increased packing density in integrated circuits more and more emphasis has to be given to solving metallization problems. Interconnection resistance, high current density and design complexity are forcing process engineers to use metals other than the traditional aluminium alloys and to use multiple levels of interconnection. Metallization processes can now represent more than 50% of the fabrication process. Enhanced deposition techniques are being utilised in an effort to reduce contact resistance and to give reliable metallization over high aspect ratio features where planarization of both interlayer dielectric and metal layer is becoming essential in the most complex metallization schemes. In this paper, the current status of integrated circuit interconnection and metallization will be reviewed. The requirements of metallization in devices will be described from both the electrical and fabrication points of view. Particular emphasis will be given to the use of ion beam techniques, e.g. ion beam cleaning, ion mixing, bias sputtering and back sputtering for conformal deposition and planarization.