Abstract

To cope with the higher luminosity and physics cross-sections for the third run of the Large Hadron Collider (LHC) and beyond, the Trigger and Data Acquisition (TDAQ) system of the ATLAS experiment at CERN is being upgraded. Part of the TDAQ system, the Muon to Central Trigger Processor Interface (MUCTPI) receives muon candidates information from each of the 208 barrel and endcap muon trigger sectors, counts muon candidates for each transverse momentum threshold and sends the result to the Central Trigger Processor (CTP). The MUCTPI takes into account the possible overlap between trigger sectors in order to avoid double counting of muon candidates. A full redesign and replacement of the existing MUCTPI is required in order to provide full-granularity muon position information at the bunch crossing rate to the Topological Trigger processor (L1Topo) and to be able to interface with the new sector logic modules. State-of-the-art FPGA technology and highdensity ribbon fibre-optic transmitters and receivers arebeing used to implement the MUCTPI in a single AdvancedTCA blade, compared to 18 9U VMEbus cards in the existing system. The upgraded MUCTPI featuresover 270 multi-gigabit optical inputs/outputs with an aggregate bandwidth of over 2 Tbit/sec. This work presents the hardware design, results from the validation of the first prototype, the testing of the optical interfaces, and integration tests with the muon sector logic.

Highlights

  • A TLAS [1] is a particle physics experiment at the Large Hadron Collider (LHC) at CERN

  • The online trigger of ATLAS is structured in a 2-level architecture in order to reduce the event rate from a bunch crossing rate of 40 MHz down to 1 kHz written to permanent storage

  • The higher bandwidth of the high-speed serial optical connections from the muon trigger sector logic modules to the Muon to Central Trigger Processor Interface (MUCTPI) system enables a higher number of muon candidates to be received

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Summary

INTRODUCTION

A TLAS [1] is a particle physics experiment at the Large Hadron Collider (LHC) at CERN. The Level-1 trigger system performs fast event selection based on reduced-granularity information from the calorimeters and muon detectors. Information from the calorimeter (L1Calo) and muon (L1Muon) trigger consist of multiplicities, energy and positions of trigger candidate objects. The Muon to Central Trigger Processor Interface (MUCTPI) [3] combines the information from the muon trigger sector logic (SL) modules of the barrel and end-cap regions of the detector and calculates the total multiplicity of muon candidates. The MUCTPI sends the multiplicity for each of six energy thresholds to the Central Trigger Processor (CTP) It sends muon position and energy information of selected muon candidates [4] to the Level-1 Topological Trigger Processor (L1Topo) [5]. 12 Ribbon fiber Rx/Tx Multi-gigabit serial electrical LVDS electrical (low latency)

MUCTPI ARCHITECTURE
Muon Sector Processor
System on chip
On-board connectivity
Off-board connectivity
TESTING OF MGT SERIAL LINKS
TTC RECOVERY
48 MHz crystal
VIII. CONCLUSION
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