Abstract
We present the results of an R&D study for a specialized processor capable of precisely reconstructing events with hundreds of charged-particle tracks in pixel and silicon strip detectors at 40 MHz, thus suitable for processing LHC events at the full crossing frequency. For this purpose we design and test a massively parallel pattern-recognition algorithm, inspired to the current understanding of the mechanisms adopted by the primary visual cortex of mammals in the early stages of visual-information processing. The detailed geometry and charged-particle's activity of a large tracking detector are simulated and used to assess the performance of the artificial retina algorithm. We find that high-quality tracking in large detectors is possible with sub-microsecond latencies when the algorithm is implemented in modern, high-speed, high-bandwidth FPGA devices.
Highlights
Higher LHC energy and luminosity increase the challenge of data acquisition and event reconstruction in the LHC experiments
To benchmark the retina algorithm, we decided to perform the first stage of the upgraded LHCb detector tracking reconstruction [3], using the information of only two sub-detectors, placed upstream of the magnet: the vertex locator (VELO), a silicon-pixel detector [4] and the upstream tracker (UT) [5], a silicon microstrip detector
We report the efficiency of the offline LHCb track reconstruction algorithm, performing the same task as the efficiency efficiency
Summary
Higher LHC energy and luminosity increase the challenge of data acquisition and event reconstruction in the LHC experiments. Real-time track reconstruction could prove crucial to quickly select potentially interesting events for higher level of processing. Performing such a task at the LHC crossing rate is a major challenge because of the large combinatorial and the size of the associated information flow and requires unprecedented massively parallel pattern-recognition algorithms. For this purpose we design and test a neurobiology-inspired
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