Abstract
This article reviews 5 different articles on optimizing comparators and focuses on their innovations. Many innovative methods are used to get a higher comparison speed, lower power consumption and degraded noise comparator. Many novel methods such as connecting the conventional two-stage dynamic comparator to a transconductance-enhanced latching stage, adding a charge pump to the Miyahara’s comparator, engendering two propagating edges in two inverter loops and measuring the distance between the two edges to compare different input voltage and using an inverter-based input pair which is powered by a floating reservoir capacitor can significantly achieve these goals. What’s more, a three-stage feedforward fully dynamic comparator with an extra parallel feedforward path, which is a completely innovatory and newly designed comparator, is also proposed.
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