Abstract
The testability of microprocessors has become a very important question, especially for device manufacturers. Defining a set of worst case input vectors to exhaustively test still presents one of the major testing problems. This paper discusses a test strategy for microprocessors where the internal logic is separated into two types: data logic and control logic. This approach can be used to ease the definition of the test vectors A practical example is presented in the form of a test program for the SAB 8080 A microprocessor. The worst case functional pattern that was created lasts only 130 ms when run at 2.5 MHz.
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