Abstract
HV-CMOS pixel sensors are a promising option for the tracker upgrade of the ATLAS experiment at the LHC, as well as for other future tracking applications in which large areas are to be instrumented with radiation-tolerant silicon pixel sensors. We present results of testbeam characterisations of the 4th generation of Capacitively Coupled Pixel Detectors (CCPDv4) produced with the ams H18 HV-CMOS process that have been irradiated with different particles (reactor neutrons and 18 MeV protons) to fluences between 1× 1014 and 5× 1015 1−MeV− neq. The sensors were glued to ATLAS FE-I4 pixel readout chips and measured at the CERN SPS H8 beamline using the FE-I4 beam telescope. Results for all fluences are very encouraging with all hit efficiencies being better than 97% for bias voltages of 85 V. The sample irradiated to a fluence of 1× 1015 neq—a relevant value for a large volume of the upgraded tracker—exhibited 99.7% average hit efficiency. The results give strong evidence for the radiation tolerance of HV-CMOS sensors and their suitability as sensors for the experimental HL-LHC upgrades and future large-area silicon-based tracking detectors in high-radiation environments.
Highlights
CCPDv4CCPDv44 sensors – the 4th generation of test sensors produced in the ams H18 process using regularly scheduled multi-project wafer productions – were produced on a nominal 10 Ω · cm substrate
In its most simple form, a matrix of DNWs could be used as a classical planar n+-in-p pixel detector
Sensors relying on dedicated readout chips are e.g. the HV2FEI4/CCPD (HV-CMOS-to-FE-I4 or alternatively Capacitively Coupled Pixel Detector) prototypes [8] intended for use in the upgraded ATLAS detector at the HL-LHC
Summary
CCPDv44 sensors – the 4th generation of test sensors produced in the ams H18 process using regularly scheduled multi-project wafer productions – were produced on a nominal 10 Ω · cm substrate. The CCPDv4 contains a pixel matrix matching the FE-I4 with several different pixel flavours, out of which this study focused on the performance of the so-called STime-type pixels (see figure 1b). Each STime pixel on the HV-CMOS sensor features a size of only 33 μm by 125 μm and contains an amplifier and a discriminator together with a 4-bit in-pixel Tune-DAC, allowing a perpixel threshold tuning. To match the FE-I4 pixel size of 50 μm by 250 μm, the HV-CMOS pixels are grouped together in gangs of three, forming a 100 μm by 125 μm large macro-pixel (see figure 2a). While the chip allows the encoding of the hit pixel’s coordinate, this feature was not used during this study and testbeam reconstruction was performed on the macro-pixel level. Further details about the creation of the samples can be found in [11] and will not be repeated here; the calibration factor between deposited charge and threshold voltage of ∼8.6 e−/mV from [11] can be applied to this work, as it has not been re-measured and to be transparent, the thresholds are given in mV throughout this work
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