Test structures to measure the heat capacity of CMOS layer sandwiches

Abstract

We report novel thermal characterization microstructures to measure the heat capacity of CMOS thin film sandwiches. This parameter is relevant, e.g., for the dynamic response of thermal CMOS microtransducers and for the thermal management of integrated circuits. The test structures were fabricated using a commercial 2-/spl mu/m CMOS process, followed by maskless micromachining. The propagation of heat waves in the structures is monitored, which provides the thermal conductivity and heat capacity of CMOS thin film sandwiches. At 300 K, volumetric heat capacities of (1.71/spl plusmn/0.12)/spl times/10/sup 6/ Jm/sup -3/K/sup -1/ and (2.41/spl plusmn/1.88)/spl times/10/sup 6/ Jm/sup -3/K/sup -1/ were obtained for the sandwich of CMOS dielectrics and for the lower CMOS metal, respectively. These values do not deviate significantly from available bulk data of such materials.