Test Scheme and Degradation Model of Accumulated Electrostatic Discharge (ESD) Damage for Insulated Gate Bipolar Transistor (IGBT) Prognostics

Abstract

This paper develops a degradation test scheme for insulated gate bipolar transistors (IGBTs) that are subjected to repeated electrostatic discharge (ESD). The proposed 7-step scheme is implemented to characterize the latent ESD damage of trench gate field stop IGBTs. An empirical degradation model based on the shift in threshold voltage is proposed with three model parameters: two parameters are IGBT-type-dependent and the other parameter is manufacturer-dependent. The two IGBT-type-dependent parameters for trench gate field stop IGBTs are determined using the test results obtained from two types of IGBT components produced by the same manufacturer. The correlation between the model and the test data is extremely high, which proves the accuracy of the proposed model. The applicability of the model is further corroborated using the test data obtained from IGBT components and modules produced by other manufacturers. The results confirm that the proposed degradation model can accurately predict the degradation of IGBT components as well as modules subjected to ESD damage.