Test generation for multiple stuck-open faults in CMOS logic circuits

Abstract

A test generation procedure to derive robust two-pattern tests for stuck-open faults is presented, based on the concept of using single-fault test sets for multiple-fault detection. If the tests of all single stuck-open faults at the checkpoints can be obtained, the resulting test set will detect all the multiple stuck-open faults in the circuit. It is shown how the fault selection ordering affects the fault coverage, and a fault selection rule is suggested to improve the test generation and fault coverage. A test generation system based on the test generation procedure and fault selection rule has been implemented in C language on a SUN workstation. Several examples are given to demonstrate the versatility of the test generation procedure. >