Abstract

Test data compression is an efficient methodology in reducing large test data volume for system-on-a-chip designs. In this paper, a variable-to-variable length compression method based on encoding runs of compatible patterns is presented. Test data in the test set is divided into a number of sequences. Each sequence is constituted by a series of compatible patterns in which information such as pattern length and number of pattern runs is encoded. Theoretical analyses on the evolution of the proposed Multi-Dimensional Pattern Run-Length Compression (MD-PRC) are made respectively from one-Dimensional-PRC to three-Dimensional-PRC. To demonstrate the effectiveness of the proposed method, experiments are conducted on both larger ISCAS'89 benchmarks and the industrial circuits with large number of don't cares. Results show this method can achieve significant compression in test data volume and have good adaptation to industrial-size circuits.

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