Test Compaction by Test Removal Under Transparent Scan

Abstract

This brief describes a new approach to test compaction under transparent scan. Transparent scan achieves higher levels of test compaction than possible with the conventional scan-based tests by interleaving scan shift cycles and functional clock cycles in arbitrary ways. Earlier approaches relied on the computation of a single transparent-scan sequence, and the omission of test vectors from it. However, a single transparent-scan sequence can be prohibitively long. In the approach described in this brief, a transparent-scan test set consists of several sequences whose lengths are limited. Test compaction is achieved by combining sequences into longer sequences that detect more faults, and removing from the test set entire sequences that become unnecessary. Experimental results for benchmark circuits demonstrate the ability of the procedure to achieve test compaction without creating prohibitively long transparent-scan sequences.