Abstract
This paper explores the temperature sensitivity of Inner-gate engineered junctionless silicon nanotube FET (JL-SiNT-FET) on analog/RF performance. It is found that the reduction in the operating temperature from 400 K to 100 K improves the various analog/RF figure of merits (FOMs) of all the three configurations (DS-JL-SiNT-FET, D-JL-SiNT-FET, and S-JL-SiNT-FET) of JL-SiNT-FET by considerable expanse. The improvement in intrinsic dc gain (AV) is found to be ~1.8 dB, 2.2 dB, and 1.6 dB respectively for DS-JL-SiNT-FET, D-JL-SiNT-FET, and S-JL-SiNT-FET when the working temperature is reduced from 400 K to 100 K. Additionally, the improvement in cut-off frequency (fT), maximum oscillation frequency (fMAX), and gain-frequency product (GFP) caused by temperature variation are correspondingly significant in all the three configurations of JLSiNT-FET. It is also observed that the improvement (ΔF = FT=100 - FT=400, where F is the analog/RF FOM) caused by the reduction in temperature is almost similar in all the configurations.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
