Temperature Distribution Evaluation of Single Chip by Multiple Currents V CE (T) Method

Abstract

With the ever-growing power density in power electronics, the temperature difference between the center and the edge of a chip can easily exceed 40 K, which poses a serious challenge to the reliability of power devices, and evaluation of single-chip temperature distribution will be more significant than classical virtual junction temperature for reliability assessment. In this article, a multicurrent V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">CE</sub> ( T) method is proposed to evaluate the single-chip temperature distribution. Unlike the conventional V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">CE</sub> ( T) method measuring the saturation voltage at only one small measurement current, this method requires that the voltages are measured at multiple different measurement currents, and then, the temperature distribution is obtained by solving a system of nonlinear equations. To improve the accuracy of the solution, the chip temperature distribution is represented by a mathematical function, which can greatly reduce the unknown parameters in the equations. Two common different shapes (square and rectangle) of the chip are chosen as research objects, this method is successfully applied in the dc power cycling test and verified by the infrared (IR) camera, and the calculation results agreed well with experimental results. Moreover, the possible effects of the introduction of mathematical models on the evaluation results have been discussed. The proposed method extends the conventional V <sub xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">CE</sub> ( T) method and finds its capability in chip temperature distribution evaluation, which could help investigate fatigue failure from different perspectives.