Temperature dependent model for threshold voltage and subthreshold slope of strained-Si channel MOSFETs with a polysilicon gate

Abstract

We present a temperature dependent model for the threshold voltage Vt and subthreshold slope S of strained-Si channel MOSFETs and validate it with reported experimental data for a wide range of temperature, channel doping concentration, oxide thickness and strain value. Such model includes the effect of lattice strain on material, temperature dependent effective mass of carriers, interface-trapped charge density and bandgap narrowing due to heavy channel doping. Also considered are polydepletion effects, carrier localization effect in the ultra-thin channel and quantum-mechanical effects. Our investigation reveals that the threshold voltage reduces linearly with increasing temperature whereas the subthreshold slope increases. In addition Vt is found to be sensitive to strain while S is weakly dependent on strain. Moreover, the channel doping concentration influences both Vt and S, and also the rate of change of Vt with temperature. Furthermore, S decreases for a lightly doped channel particularly at lower temperatures.