Temperature control of multiple wafers during etching of 2′ sapphire wafers for patterned sapphire substrates (PSS)

Abstract

AbstractThis paper details the techniques developed to enable the simultaneous active cooling of 12 x 2′ sapphire wafers during RIE‐ICP etching. In order to maximise etch rates with Photoresist as a mask it is necessary to cool the wafer as during RIE‐ICP etching process the wafers experience heating from the plasma. If this thermal load is not controlled the wafer temperature becomes elevated which will push the Photoresist above its upper temperature limit and it can degrade. For plasma processing the wafers are placed on an electrode which is temperature controlled using a chiller. However because the processing occurs at low pressures, typically <5mtorr, there is little thermal contact between the electrode and the wafers. Temperature control of the samples is achieved by ensuring a constant He pressure is maintained at the non‐plasma facing side of each individual wafer. The etch process is then optimized giving an etch rate of 50nm/min, selectivity to PR mask 0.7:1 and a cross batch uniformity of +/‐5%, the etch feature is shown in the SEM below (© 2010 WILEY‐VCH Verlag GmbH & Co. KGaA, Weinheim)