Abstract
The aim of this paper is to develop a simple and accurate model of the gate induced drain leakage (GIDL) of MOSFET's that can be easily implemented in a circuit simulator. We use an analytical expression of band-to-band tunneling in the case of trap-free gate oxide. The dependence of the GIDL current with temperature and with the drain potential is studded and modeled in the case of a n-MOS transistor. A methodology of parameter extraction is proposed.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
