Abstract

In this work, the electron energy-loss spectroscopy (EELS) methodology was used to dig out the failure mechanism of marginal DRAM electrical failure issues. The EELS spectrum image (SI), energy-loss near-edge structure (ELNES), and MLLS (multiple linear least squares) fitting techniques were utilized to obtain high resolution elemental mappings and chemical bonding information. Three case studies were conducted. In the first case, we successfully used EELS SI and ELNES techniques to find out and identify the TiN extrusion between the storage node contact (SNC) and its neighboring bit line (BL). This leakage path would cause the DRAM retention issue. In the second case, we used the ELNES MLLS fitting method to obtain the Co-silicide phase distribution mapping within NC silicide area. We found the incomplete phase transformation from CoSi to CoSi2 is the root cause of the high resistance path which may lead to a DRAM timing issue. In the last case, we utilized ELNES MLLS techniques to separate Si signals from the overlapped Si3Nx spacer layer and enhance the contrast of the abnormal Si leakage path.

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