TEM characterization of subsurface damage in silicon carbide substrates

Abstract

Because of its wide band gap and physical stability, silicon carbide is an important semiconductor material for high power, high temperature solid state devices. In such applications, any surface damage introduced during wafer fabrication is detrimental to optimum device fabrication and operation. A typical wafer fabrication procedure consists of mechanical lapping and polishing, followed by chemical etching for removal of any residual mechanical damage. However, SiC is a refractory material with strong atomic bonding and high mechanical hardness, chemical etching of its surface is often difficult. Mechanical polishing is thus the crucial step during wafer preparation. Though a number of techniques are currently in use for assessment of polishing induced surface damage, such as grazing incidence xray diffraction and Rutherford backscattering, none of them is effective for studying the hidden damage beneath the polished surface. In the present work cross-sectional transmission electron microscopy (XTEM) was used to observe directly the nature and extent of subsurface damage in 6HSiC substrates after different stages of mechanical polishing, and to elucidate the possible mechanism for material removal by the abrasive treatments.