Abstract

An 8-bit 40-MS/s low power Multiplying Digital-to-Analog Converter (MDAC) for a pipelined-to-Analog to Digital converter (ADC) is presented. The conventional dedicated operational amplifier (Op-Amp) is performed by using telescopic architecture that features low power and less-area. Further reduction of power and area is achieved by using multifunction 1.5bit/stage MDAC arch itecture. The design of the Op-Amp is performed by the elaboration of a program based on multi objective genetic algorithms to allow automated optimization. The proposed program is used to find the optimal transistors sizes (length and width) in order to obtain the best Op-Amp performances for the MDAC. In th is study, six performances are considered, direct current gain, unity-gain bandwidth, phase margin, power consumption, area, slew rate, thermal noise, and signal to noise ratio. The Matlab optimization toolbox is used to implement the program. Simulations were performed by using Cadence Virtuoso Spectre circuit simulator in standard AMS 0.18μm CMOS technology. A good agreement is observed between the results obtained by the program optimization and simulation, after that the Op-Amp is introduced in the MDAC circuit to extract its performances.

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