Technology mapping technique for enhancing throughput of multi-column-cell systems

Abstract

The character projection (CP) lithography is utilized for maskless lithography (ML2) and is a potential for the future photomask manufacture. The drawback of the electron beam (EB) lithography is its low throughput and leads to a rise in IC prices. The number of EB shots to project an IC chip determines the fabrication time and the amortization cost and must be reduced. A multi-column-cell (MCC) system is a lithographic one in which column-cells can independently project patterns onto a silicon wafer in parallel with the CP and variable shaped beam (VSB) lithographies. This paper presents a technology mapping technique for enhancing the throughput of MCC systems. Our technique enhances the throughput of MCC systems by reducing the number of EB shots to project an entire IC chip. The target MCC system for which our technology mapping optimizes a circuit is the one which has not uniform but multiform CP masks among column-cells. Such an MCC system can project more cell functions with the CP than a uniform CP masks-based system. Comparing with an conventional technique, our technique has achieved a 19.8% smaller number of EB shots without any performance degradation of ICs under a timing constraint. Moreover, our technique has achieved a 33.4% smaller number of EB shots under no performance constraints. Our technique is easy for both IC designers and equipment developers to adopt because it is a software approach with no additional modification on character projection equipment.