Abstract
The ability of the semiconductor industry to produce chips with higher and higher circuit densities has created a challenge for the product designer: to utilize this capacity and still develop chips rapidly at reasonable cost. A multi-faceted approach to VLSI design is described that significantly reduces product development time and resource from those required with existing methods. This approach is based on the use of PLA structures or macros. It consists of a hardware/software modeling technique, use of laser-personalizable PLAs for rapid modeling of PLA macros, and a method for repairing design errors (that may hide other errors) on the actual VLSI wafers with a laser tool. A two-pass VLSI design is therefore highly probable.
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