Abstract
The dynamic power dissipation is the dominant source of power dissipation in CMOS circuits. It is directly related to the number of signal transitions and glitches. The glitches occupy a considerable amount of power of the total power dissipation in CMOS circuits. This paper presents a survey of the different techniques used for decreasing the dynamic power by reduction of glitches. The advantages and limitations of these techniques are also discussed.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
More From: International Journal on Intelligent Electronic Systems
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.