Abstract
This paper develops an unfamiliar modelling of printed circuit board (PCB) interconnect behaving as HH-tree. The developed model is based on the tensorial analysis of networks (TAN) formalism. The HH-tree is implemented with the equivalent LC-network based on Hammerstad-Jensen modelling. The unfamiliar TAN methodology is described by starting from the equivalent graph topology. The HH-tree TAN model is established from the branch and mesh spaces implementation of voltage, current and impedance tensorial objects. Then, the HH-tree PCB problem is reformulated with the tensorial electrical system metric. The solution of the metric problem is validated with commercial tool simulation from DC up to 2.5 GHz with a microstrip circuit proof-of-concept. As expected, computed and simulated results are in good agreement.
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