Abstract
The multi-core architecture has revolutionized the parallel computing. Despite this, the modern age compilers have a long way to achieve auto-parallelization. Through this paper, we introduce a language that encouraging the auto-parallelization. We are also introducing Front-End for our auto-parallelizing compiler. Later, we examined our compiler employing a different number of core and verify results based on different metrics based on total compilation time, memory utilization, power utilization and CPU utilization. At last, we learned that parallelizing multiple files engage more CPU resources, memory and energy, but it finishes the task at hand in less time. In this paper, we have proposed a loop code generation technique that makes the generation of nested loop IR code faster by dividing the blocks into some extra code blocks using a modular approach. Our TAM compiler technique speedup by 7.506, 5.283 and 2.509 against sequential compilation when we utilized 8, 4 and 2 cores respectively. We observed that the CPU utilization of the TAM compiler reaches the maximum permissible limit when an optimal parallelizable instance is compiled.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callMore From: ACM Transactions on Asian and Low-Resource Language Information Processing
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
