Abstract
Electronically scanned digital antenna array apertures have important applications in ultra-wideband digital beamsteering for cognitive radio, imaging, radio astronomy, wireless communications and sensing. The use of 2-D IIR frequency-planar beam plane-wave filters as a low complexity alternative for phased array algorithms is currently receiving attention. In this work, a systolic array VLSI architectures for the real-time implementation of the 2-D IIR beam plane-wave filter has been designed by replacing unit delays along both space and time dimensions with first order discrete integrators, thereby leading to lower sensitivity to filter coefficient quantization which in turn results in improved RF beam accuracy. The proposed designs have reduced error in the magnitude transfer function compared to the usual direct form structures. Beam filters of order 1 and 2 are designed using integral form realization. The designs show small gain magnitude error of 0.3% for 1st-order beam filter with respect to digital feedback coefficients of the filter which have been chosen at 13-bits of precision. The design examples also show a small gain magnitude error of 1.5% in a 2nd-order beam filter with filter feedback coefficients having 15-bits of precision. This is an improvement over comparable direct form architectures. Prototype circuits for the proposed integral form beam filters have been designed and simulated using Xilinx Virtex 6 xc6vsx475t-1ff1759 FPGA devices.
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.