Abstract
In post-Moore era, further enhancement of computing efficiency in conventional computing system has become progressively slower due to the memory-wall bottleneck. Monolithic 3D (M3D) integration technology provides ultra-high inter-layer bandwidth, and thus becomes a promising solution for the memory-wall issue. This work will first discuss the principles of M3D memory-centric computing based on back-end-of-line (BEOL) process integration of Resistive Random Access Memory (RRAM) and nano-devices. Next, the recent progresses on system-technology co-optimization (STCO) for the M3D system, including the fabrication process of RRAM devices, computation-in-memory (CIM) circuit and computing system, are reviewed. Furthermore, a cross-layer simulator for M3D STCO is developed. Also, benchmark and design guidelines for the future M3D systems are provided based on the simulator outputs.
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