System-on-a-Chip (SoC) Based Hardware Acceleration for Video Codec

Jeffrey Fan,Xinwei Niu

doi:10.4236/opj.2013.32b028

Abstract

Nowadays, from home monitoring to large airport security, a lot of digital video surveillance systems have been used. Digital surveillance system usually requires streaming video processing abilities. As an advanced video coding method, H.264 is introduced to reduce the large video data dramatically (usually by 70X or more). However, computational overhead occurs when coding and decoding H.264 video. In this paper, a System-on-a-Chip (SoC) based hardware acceleration solution for video codec is proposed, which can also be used for other software applications. The characteristics of the video codec are analyzed by using the profiling tool. The Hadamard function, which is the bottleneck of H.264, is identified not only by execution time but also another two attributes, such as cycle per loop and loop round. The Co-processor approach is applied to accelerate the Hadamard function by transforming it to hardware. Performance improvement, resource costs and energy consumption are compared and analyzed. Experimental results indicate that 76.5% energy deduction and 8.09X speedup can be reached after balancing these three key factors.

Highlights

System-on-a-Chip (SoC) refers to integrating all components of a computer or other electronic systems into a single integrated circuit
A hardware acceleration method to improve the performance of software application is introduced
Even H.264 is used as our target software application, but our hardware acceleration workflow will not be limited to H.264

Summary

Introduction

System-on-a-Chip (SoC) refers to integrating all components of a computer or other electronic systems into a single integrated circuit (chip). There are several previous researches about the software profiling and hardware acceleration for video codec. Functions with high execution time or loop rounds cannot be viewed as the most suitable candidates for hardware acceleration. A general hardware acceleration approach was presented by Chen et al [8]. They used the pipeline to accelerate the system, but their hardware accelerator was connected to the system bus, so that the processing time might be influenced if other peripherals would like to communicate with processor at the same time.

Background

Software Profiling

Hardware Acceleration

Experimental Results

Conclusions