Abstract
A new method is discussed for the systematic synthesis, design, and performance optimization of single-ended varactor-based 2:1 parametric frequency dividers (PFDs) exhibiting an ultralow-power threshold (Pth). For the first time, it is analytically shown that the Pth-value exhibited by any PFD can be expressed as an explicit closed-form function of the different impedances forming its network. Such a unique and unexplored property permits reliance on linear models, during PFD design and performance optimization. The validity of our analytical model has been verified, in a commercial circuit simulator, through the timeand frequency-domain algorithms. To demonstrate the effectiveness of our new synthesis approach, we also report on a lumped prototype of a 200:100 MHz PFD, realized on a printed circuit board (PCB). Although inductors with quality factors lower than 50 were used, the PFD prototype exhibits a Pth-value lower than -15 dBm. Such a Pth-value is the lowest one ever reported for passive varactor-based PFDs operating in the same frequency range.
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