Abstract
This paper presents the design and logic implementation of the fractal scan algorithm based on the mathematical model of the optimal scan architecture. Through the exploration of the sub-space code sequences and bit code sequences for different grey levels, we deduce the general formulae for the sequences and propose the corresponding logic implementations including the fractal scanning IP core and the general grey-level controller for Flat Panel Display (FPD). The parameterised IP core for various grey levels, embedded in FPD scan controller, can efficiently increase the scan utilisation and imaging quality. This research provides a new engineering way to solve a pressing problem of high resolution FPD technology. [Received 28 January 2010; Revised 7 July 2010; Accepted 18 December 2010]
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