Abstract
The paper presents a systematic method for the design of multiamplifier switched-capacitor (SC) decimator circuits with finite impulse response (FIR) transfer functions. From a formal description of previously proposed architectures, a set of closed form equations are derived to determine the resulting capacitance values in the circuits as a function of the desired impulse response coefficients and signal handling capability. The systematic design of two multiamplifier FIR SC decimators is then illustrated considering the practical example of an application suitable for video signal processing.
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