Abstract

Negative capacitance (NC) effects in ferroelectric (FE) films have attracted intensive attention recently in terms of both polarization kinetics modeling and low-power CMOS applications. Its physical origin, however, is controversial because the experimentally observed NC effects are different from the initial concept, particularly on the frequency/voltage dependence and hysteresis. Recently, we have proposed an electrostatic model, with which the NC effect with hysteresis and voltage dependence in FE/paraelectric (PE) stacks in dc mode is explained from a viewpoint of polarization switching. Based on this, in this work, the NC effect in the dimension of time in both FE/PE and FE capacitor–resistor (FE-R) circuit is analytically formulated and experimentally studied by comprehensively considering the dynamics of polarization switching, charge communication with power supply, and charge leaking through the capacitor. Our results suggest that such NC effects only occur in a time window in both systems and a competition between FE switching and charge compensation is the key to determine the time window. Thus, a systematic understanding is accomplished to explain most of the phenomenon associated with NC effects in FEs.

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