Abstract

This brief presents a systematic design methodology for digital-to analog (D/A) converter macrocells for integrated VLSI systems. A generic behavioral model is included for system level exploration to define the converter's specifications. The architecture and the sizes of the devices are then calculated using a performance-driven design methodology. Using a novel layout tool, the layout of the regular structures with complex connectivity, typical for D/A converters, is automatically generated. Finally, a detailed behavioral model is extracted, combining both complex dynamic behavior (glitch energy) and static behavior. A 12-bit and two 14-bit D/A converters have been designed using this approach. It is demonstrated how the applied methodology and supporting tools drastically reduce the total design time, thereby significantly increasing analog design productivity.

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.