Abstract
This paper presents a newly developed concept of digital clock generation and corresponding data processing suitable for highly integrated video upconversion systems. To increase flexibility and reliability, a single master clock source is used to derive all clocks both of locked and unlocked types. Critical analog PLLs are obsolete. Now the first IC of the next generation of low cost, high performance single-chip upconversion ICs for flicker-free TV has been designed in a 0.18 /spl mu/m copper eDRAM technology. All processing stages between tuner output (CVBS) and RGB processor input are integrated, requiring only a few external components.
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