System Avionic Architectures for RPVs.

Abstract

Abstract : Results are presented from a 6-month study to design an avionic digital processing system for the multi-mission Advanced Remotely Piloted Vehicle (ARPV) application. The recommended approach is a microprocessor-based design consisting of a distributed processing network with modular processor/memory elements (PEs) interconnected via a MIL-STD-1553A data bus. The objective was to design a digital processing system providing not only adequate performance for the anticipated ARPV missions but also the lowest possible life cycle cost (LCC). Three different processing systems were designed to meet performance requirements for specific postulated ARPV missions. The total LCC for each candidate system was then estimated using a postulated 10-year life-cycle scenario. The 'optimum' design was selected on the basis of minimum LCC. In addition to the minimum LCC, the recommended system also provides the best performance in terms of flight-critical reliability. The extensive use of standard modules throughout the distributed network provides flexible system performance by allowing throughput capacity and/or memory capacity to be increased readily as processing requirements demand. The use of standard modules is also important in achieving a low LCC. Results from this study, in particular the modular design of the basic PE, are applicable not only to the ARPV problem but other Air Force avionic processing applications as well. (Author)