Abstract
This paper proposes a novel hardware architecture for real-time face detection, which is efficient and suitable for embedded systems. The proposed architecture is based on AdaBoost learning algorithm with Haar-like features and it aims to apply face detection to a low-cost FPGA that can be applied to a legacy analog video camera as a target platform. We propose an efficient method to calculate the integral image using the cumulative line sum. We also suggest an alternative method to avoid division, which requires many operations to calculate the standard deviation. A detailed structure of system elements for image scale, integral image generator, and pipelined classifier that purposed to optimize the efficiency between the processing speed and the hardware resources is presented. The performance of the proposed architecture is described in comparison with the detection results of OpenCV using the same input images. For verification of the actual face detection on analog cameras, we designed an emulation platform using a low-cost Spartan-3 FPGA and then experimented the proposed architecture. The experimental results show that the processing time for face detection on analog video camera is 42 frames per second, which is about 3 times faster than previous works for low-cost face detection.
Highlights
Face detection is the process of finding the locations and sizes of all possible faces in a given image or in video streams
This paper proposed a low-cost and efficient fieldprogrammable gate arrays (FPGAs)-based hardware architecture for the real-time face detection system applicable to an analog video camera
We made an effort to minimize the complexity of architecture for integral image generator and classifier
Summary
Face detection is the process of finding the locations and sizes of all possible faces in a given image or in video streams. We would like to propose an alternative method, which can provide face detection in analog video cameras. Real-time processing of the face detection is required for embedded systems such as security systems [11], surveillance cameras [12], and portable devices. Consumer applications require the reliability to guarantee the processing deadlines Among these limitations, the main design concerns for face detection on embedded system are circuit area and computing speed for real-time processing. We present efficient and low-cost FPGAbased system architecture for the real-time Viola-Jones face detection applicable to legacy analog video cameras. As the result of applying the proposed architecture, we can design a physically feasible hardware system to accelerate the processing speed of the operations required for real-time face detection in analog video cameras
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