Abstract

We address the problem of automatically synthesizing digital designs from linear-time specifications. We consider various classes of specifications that can be synthesized with effort quadratic in the number of states of the reactive system, where we measure effort in symbolic steps. The synthesis algorithm is based on a novel type of game called General Reactivity of rank 1 (gr(1)), with a winning condition of the form(□ ◊p1∧⋯∧□ ◊pm)→(□ ◊q1∧⋯∧□ ◊qn), where each pi and qi is a Boolean combination of atomic propositions. We show symbolic algorithms to solve this game, to build a winning strategy and several ways to optimize the winning strategy and to extract a system from it. We also show how to use gr(1) games to solve the synthesis of ltl specifications in many interesting cases. As empirical evidence to the generality and efficiency of our approach we include a significant case study. We describe the formal specifications and the synthesis process applied to a bus arbiter, which is a realistic industrial hardware specification of modest size.

Highlights

  • One of the most ambitious and challenging problems in computer science is the automatic synthesis of programs and designs from logical specifications

  • Following the results of [18], we show how any synthesis problem whose specification is a gr(1) formula can be solved with effort O(mnN 2), where N is the size of the state space of the design and effort is measured in symbolic steps, i.e., in the number of preimage computations [19]

  • We show that the specifications for these modules can be expressed in gr(1), that their specifications are compact and easy to read, and that they can be synthesized relatively efficiently

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Summary

Introduction

One of the most ambitious and challenging problems in computer science is the automatic synthesis of programs and (digital) designs from logical specifications. [20].) Often, assumptions and guarantees can naturally be written as conjunctions of simple properties that are expressed as deterministic automata We substantiate this view by presenting two case studies of small but realistic industrial modules. Sohail et al removed some of the restrictions on the expressive power imposed by our work [23, 24] They present a compositional approach in which each property is translated to a Buchi or parity automaton and the resulting generalized parity game is solved symbolically. They show how in some cases to circumvent the construction of deterministic automata based on [25].

Preliminaries
Fair Discrete Systems
Symbolic Jds Specifications
Example
Extracting the Strategy
Minimizing the Strategy
Generating Circuits from bdds
LTL Synthesis
AMBA AHB Case Study
Formal Specification
A10 A11 A12 A13
Deciding the Next Access
Synthesis
Discussion and Conclusions

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