Synthesis of Clock Signal from Genetic Oscillator

Abstract

This paper attempts to design a genetic frequency synthesizer circuit with counter to synthesize a clock signal whose frequency is a multiple of that of an existing synthetic genetic oscillator. A genetic waveform-shaping circuit constructed by Buffers in series is used to reshape a genetic oscillation signal into a pulse-width-modulated (PWM) signal with different duty cycle. Design of the Buffers and accompanied genetic logic gates is based on the use of the real genetic structural genetic algorithm. By assembling different PWM signals, a series of clock pulses is synthesized as the rising and falling edges of the desired clock signals triggering the counter and the clock signal with the integer multiple of base frequency is generated from the same oscillation signal. Simulation results show that the proposed genetic frequency synthesizer circuit is effective to realize a variety of genetic clocks.