Abstract

Asynchronous Finite State Machines (AFSMs) are usually described in an asynchronous specification, such as Burst-Mode (BM), Extended Burst-Mode (XBM), and Signal Transition Graph (STG), which are the well-known in literature. The use of these specifications requires the satisfaction of some properties, which leads to an increase in states and state transitions when compared to synchronous specification. Increasing states and state transitions results in increased processing time for AFSMs. The vast majority of literature methods that synthesize AFSMs start from asynchronous specifications. In this article, we present an architecture and approach to synthesize AFSMs that accept the synchronous specification. Through a case study, we present an architecture and approach that shows an average 61% reduction in processing time compared to two asynchronous paradigm architectures and approaches.

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