Synthesis of Analog IC Building Blocks

Abstract

A new methodology based on the concept of performance based figure of merit, has been proposed for synthesizing optimal performance differential input-stage amplifiers and second stage amplifier under the constraints of area. This concept has been validated with examples both at low and medium frequencies. The proposed figures of merit proposed for different structures and in different frequency domains peak at certain values of relative area allocation to the input transistors in the range of 62 % to 92 % of the available area. The peak achievable value of the figure of merit is a function of both area and power. It is observed that the performance parameters, i.e. differential dc voltage gain, unity-gain bandwidth and input-referred noise achieved at peak figure of merit are very close to their best individually achievable values. Using this concept, a CAD tool has been developed in C/C++, for the synthesis of differential amplifiers and tested for 2400 design-syntheses with varying dc power, differential dc voltage gain, unity-gain bandwidth and input-referred noise. The synthesized circuits are mainly governed by power and noise. At a constant power, area required increases exponentially with the requirement of reduced input-referred noise. Area requirement can also be reduced at the cost of increased power consumption for the same input-referred noise. Hence, a clear Area -- Power tradeoff is seen in the synthesized designs.