Synthesis and FPGA-based implementation of an indirect sliding mode current controller of a synchronous machine

Abstract

This paper presents the synthesis and the implementation on a field programmable gate array (FPGA) of an indirect sliding mode current control of a synchronous machine. The adopted sliding mode current control strategy is very advantageous for making the controlled system robust to parameter variations and external disturbances. The main interest of using FPGAs to implement such controllers is the very important reduction of the control loop delay, which is only equal to a few microseconds. This control loop delay reduction derives directly from the possibility offered by FPGAs to design very powerful dedicated hardware architectures with free sampling instants. Numerous experimental results are shown to prove the efficiency of FPGA-based solutions to achieve high performance control.