Abstract

This paper presents a high-frequency synchronous rectifier based on a digital delay line for wireless power transfer (WPT). When performing synchronous rectification using active devices in a DC-DC WPT system, it is challenging to match the frequency of the receiving rectifier to the transmitting inverter frequency. Using an operating frequency in the tens of MHz range makes controlling the switching device's expected turn-on instant in the rectifier especially difficult due to propagation delays of various components such as the gate driver. To overcome this issue, we propose a controllable delay line implemented in a field-programmable gate array (FPGA) for synchronous rectification. A zero-crossing detector measures the voltage across the receiving coil to match the rectifier frequency with the inverter. The FPGA-based delay line then generates a desirable and controllable delay to produce the required output power. We designed and implemented the proposed synchronous rectifier in a 200 W class-E2 resonant DC-DC converter. By controlling the number of delay elements in the delay line, we varied the output power from 161 W to 89 W with a maximum efficiency of 84.6%.

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